1. Field of the Invention
The present invention relates to a multivalued read only memory (ROM) device having memory cells each capable of storing N (N=3, 4, . . . ) information, and more particularly, to a multivalued ROM device capable of carrying out a high read speed operation.
2. Description of the Related Art
In a ROM device, if N information is stored in each memory cell, the storage capacity becomes larger than a conventional ROM device. In order to meet this requirement, multivalued ROM devices having memory cells each storing N information have recently been developed.
In a prior art four-valued ROM device including memory cells each storing two-bit information (four pieces of information), in order to carry out a read operation, when an address is given to the device, three kinds of threshold voltages are applied to a selected word line. Therefore, three time periods for generating the three kinds of threshold voltages are required for one read access, thus decreasing a read operation speed. Also, the sense amplifiers of the device may be erroneously operated by a small noise. Further, the integration of the device is deteriorated. This will be explained later in detail.
Note that it is possible to provide a plurality of comparators for comparing a read voltage from a selected memory with a plurality of preset levels at one time, which increases a read operation speed (see JP-A-61-117796). However, this requires enhancing the sensitivity of the sense amplifiers, since the sense amplifiers have to amplify a small difference in potential. Also, the comparators and voltage generating circuits for the preset levels deteriorates the integration.